The present invention relates to a semiconductor package and a method for manufacturing the same.
These days semiconductor chips and semiconductor packages having the semiconductor chips capable of storing and processing huge amounts of data within extremely short time periods have and are further being developed.
Recently proposed, for use in enhancing data storage capacities and for use in for increasing data processing speeds, are stacked semiconductor packages that have at least two semiconductor chips stacked together.
In order to realize the stacked semiconductor package configurations, techniques for electrically coupling together at least two stacked semiconductor chips are needed. In this regard, a technique for electrically connecting stacked semiconductor chips by forming through-electrodes in respective semiconductor chips has recently been disclosed in the art.
The through-electrodes are electrically coupled using wiring lines which are formed on the surfaces of the semiconductor chips. When using the wiring lines formed on the surfaces of the semiconductor chips to couple together the through-electrodes, problems can arise in that the semiconductor chips volume increases.
Even though through-electrodes can be easily coupled together with the wiring lines by using bonding pads placed on the surfaces of the semiconductor chips, the structure of through-electrodes makes it difficult to be electrically coupled directly with the internal circuit patterns formed in the semiconductor chips.